MDT10F6301
8.2 Register file map :
Address
BANK 0
00
01
02
03
04
05
06
07
08~09
0A
0B
0C
0D
0E
0F
10
11~14
15
16
17~18
19
1A
1B
1C
1D
1E~1F
96
20~7F
TMR1L
IAR
RTCC
PCL
Description
Address
BANK 1
IAR
TMR
PCL
80
81
82
83
84
85
86
STATUS
MSR
PORT A
STATUS
MSR
CPIO A
PORT C
CPIO C
87
88~89
PCHLAT
INTS
PIFB1
PCHLAT
INTS
PIEB1
8A
8B
8C
8D
PSTA
8E
8F
TMR1H
T1STA
INOSCR
90
91~94
PAPHR
PAINTR
95
96
97~98
CMSTA
VRSTA
EEDATA
EEADR
EECON1
EECON2
99
9A
9B
9C
9D
9E~9F
Mapped
in
Bank 0
A0~FF
General
Register
Unimplemented memory location.
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw
P.4
2008/4
Ver. 1.0
MDTIC [ Micon Design Technology Corporation ]
