MDT10P10(BE)
Watchdog Timer control
Watchdog timer disable all the time
Watchdog timer enable all the time
Power Edge Detect
PED
Disable
Security bit
Security Disable
Security Enable
PED Enable
The default EPROM security is disable. Once the IC was set to enable, it can not set to
disable again.
(B) Program Memory
Address
000-1FF
1FF
Description
Program memory for MDT10P10
The starting address of the power on, external reset
or WDT time-out reset for MDT10P10
7. Reset Condition for all Registers
Register
CPIO A
CPIO B
TMR
IAR
RTCC
PC
STATUS
MSR
PORT A
PORT B
Address
－－
－－
－－
00h
01h
02h
03h
04h
05h
06h
Power-On Reset
1111 1111
1111 1111
- - 11 1111
xxxx xxxx
xxxx xxxx
1111 1111
0001 1xxx
111x xxxx
- - - - xxxx
xxxx xxxx
/MCLR or WDT Reset
1111 1111
1111 1111
- - 11 1111
uuuu uuuu
uuuu uuuu
1111 1111
000# #uuu
111u uuuu
- - - - uuuu
uuuu uuuu
Note : u＝unchanged, x＝unknown, -
＝unimplemented,
read as “0”
#＝value depends on the condition of the following table
This specification are subject to be changed without notice. Any latest information
please preview
ttp;//www.mdtic.com.tw
P. 5
2005/6
VER1.3
MDTIC [ Micon Design Technology Corporation ]
