MDT10P72 参数 Datasheet PDF下载

MDT10P72

Bit

5~4

Symbol

T1CKPS1

~

T1CKPS0

1 1 = 1:8 Prescale value

1 0 = 1:4 Prescale value

0 1 = 1:2 Prescale value

0 0 = 1:1 Prescale value

7~6

--

Unimplemented

Function

(15) TMR2 : R11

TMR2 register

(16) T2STA : R12

Bit

1~0

Symbol

T2CKPS1

~

T2CKPS0

2

TMR2ON

0 0 = Prescaler is 1

0 1 = Prescaler is 4

1 x = Prescaler is 16

1 : TMR2 is on

0 : TMR2 is off

7~3

--

Unimplemented

Function

(17) SCMBUF : R13

Serial communication port buffer

(18) SCMCTL : R14

Bit

3~0

Symbol

SCM3

~

SCM0

Function

0 0 0 0 : SCM master mode , clock = Fosc/4

0 0 0 1 : SCM master mode , clock = Fosc/16

0 0 1 0 : SCM master mode , clock = Fosc/64

0 0 1 1 : SCM master mode , clock = TMR2 output/2

0 1 0 0 : SCM slave mode , clock = SCK pin , /SS control enable

0 1 0 1 : SCM slave mode , clock = SCK pin , /SS control disable

4

CKS

0 : Transmit happens on rising edge , receive on falling edge, Idle state for clock is low

level

1 : Transmit happens on falling edge , receive on rising edge, Idle state for clock is high

level.

5

SCMEN

0 : disable SCM, then pc3, pc4, pc5 is I/O port.

1 : enable SCM

6

SCMROI

0 : No overflow

1 : Overflow

7

WCOL

0 : No collision

This specification are subject to be changed without notice. Any latest information please preview

P. 7

2008/6

Ver. 2.0