MDT10P7301
(20) CCP1L: R15
Capture/Compare/PWM LSB
(21) CCP1H: R16
Capture/Compare/PWM MSB
(22) CCP1CTL: R17
Bit
3~0
Symbol
CCP1M3
~
CCP1M0
0 0 0 0: CCP1 off
0 1 0 0: Capture1 mode, every falling edge
0 1 0 1: Capture1 mode, every rising edge
0 1 1 0: Capture1 mode, every 4
th
rising edge
0 1 1 1: Capture1 mode, every 16
th
rising edge
1 0 0 0: Compare1 mode, set output on match
1 0 0 1: Compare1 mode, clear output on match
1 0 1 0: Compare1 mode, generate software interrupt on match
1 0 1 1: Compare1 mode, trigger special event
1 1 x x: PWM1 mode
5~4
7~6
PWM1LSB These bits are the two LSBs of the PWM1 duty cycle
--
Unimplemented
Function
(23) RCSC: R18
Bit
0
1
Symbol
RX9DF
OERF
9
th
bit of received data
0: No overrun error
1: Overrun error
2
FERF
0: No framing error
1: Framing error
3
4
--
CRENF
Unimplemented
0: Disable continuous receive
1: Enable continuous receive
5
SRENF
0: Disable single receive
1: Enable single receive
6
RX9ENF
0: Select 8-bit reception
1: Select 9-bit reception
7
SPENF
0: Serial port disable
1: Serial port enable
Function
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 9
2008/06 Ver. 1.2
MDTIC [ Micon Design Technology Corporation ]
