MDT2030(CC)
5. Block Diagram
S ta ck Tw o Le ve ls
E PR OM
2 0 4 8 X1 4
RAM
7 3 X8
P o rt A
P o rt
P A0 ~P A3
4 b its
1 1 b its
1 1 b its
14
b its
In s tru ctio n
Re g is te r
P ro g ra m C o u n te rs
S p e c ia l Re g is te r
P o rt
P B0 ~ P B7
8 b its
P o rt B
O SC 2
MCLR
OSC 1
D 0 ~D 7
O s cilla to r Circu it
In s tru ctio n
De co d e r
Co n tro l C ircu it
Da ta
8 -b it
P o we r o n Re s e t
P o w e r Do wn R e s e t
W o rkin g R e g is te r
ALU
S ta tu s R e g is te r
8 -b it Tim e r/Co u n te r
P re s ca le
W DT/O S T
Tim e r
R TCC
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 2
2005/6
Ver. 1.4
MDTIC [ Micon Design Technology Corporation ]
