CF
:= PCA Counter overflow Flag
This bit must be set by hardware itself. It can be cleared by software program.
CR
:= PCA Run control bit
0:=
(default)
Disable counting of the PCA counter
1:=
Start counting of the PCA counter
CCF3
:= Module-3 interrupt Flag
This bit must be set by hardware itself when a match or capture from module-3 occurs.
It can be cleared by software program.
A match means the value of the PCA counter equals the value of the Capture/Compare
Register in the module-3.
A capture means a specific edge from CEX3 happens, so the Capture/Compare register
latches the value of the PCA counter, and the CCF3 is set.
CCF2
:= Module-2 interrupt Flag
This bit must be set by hardware itself when a match or capture from module-2 occurs.
It can be cleared by software program.
A match means the value of the PCA counter equals the value of the Capture/Compare
Register in the module-2.
A capture means a specific edge from CEX2 happens, so the Capture/Compare register
latches the value of the PCA counter, and the CCF2 is set.
CCF1
:= Module-1 interrupt Flag
This bit must be set by hardware itself when a match or capture from module-1 occurs.
It can be cleared by software program.
A match means the value of the PCA counter equals the value of the Capture/Compare
Register in the module-1.
A capture means a specific edge from CEX1 happens, so the Capture/Compare register
latches the value of the PCA counter, and the CCF1 is set.
CCF0
:= Module-0 interrupt Flag
This bit must be set by hardware itself when a match or capture from module-0 occurs.
It can be cleared by software program.
A match means the value of the PCA counter equals the value of the Capture/Compare
Register in the module-0.
A capture means a specific edge from CEX0 happens, so the Capture/Compare register
latches the value of the PCA counter, and the CCF0 is set.
Each module in the PCA has a special function register associated with it:
CCAPM0
for
module-0,
CCAPM1
for module-1,
CCAPM2
for module-2 and
CCAPM3
for module-3. The
register contains those bits that control the mode in which each module will operate. The
ECCFn
bit controls if to pass the interrupt from
CCFn
flag in the
CCON
SFR to the MCU when
a match or compare occurs in the associated module.
PWMn
enables the pulse width
modulation mode. The
TOGn
bit when set causes the pin
CEXn
output associated with the
module to toggle when there is a match between the PCA counter and the module’s
Capture/Compare register.
The match bit(MATn) when set will cause the
CCFn
bit in the
CCON
register to be set when there is a match between the PCA counter and the module’s
Capture/Compare register.
The next two bits
CAPNn
and
CAPPn
determine the edge type that a capture input will be
active on. The
CAPNn
bit enables the negative edge, and the
CAPPn
bit enables the positive
40
MPC82x54A Data Sheet
MEGAWIN
MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
