All of the bits that generate interrupts can be set or cleared by software, and it has the same
impact as done through hardware. In other words, interrupts or pending interrupts can be
generated or canceled in software.
The following content describes several SFR related to interrupt mechanism.
SFR: IE (Interrupt Enabling):
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
EA
ET2
ES
ET1
EX1
ET0
EX0
EA: Global disables all interrupts when cleared.
ET2: When set, enables Timer2 interrupt.
ES:
When set, enables the serial port interrupt.
ET1: When set, enables Timer1 interrupt.
EX1: When set, enables external interrupt 1.
ET0: When set, enables Timer 0 interrupt.
EX0: When set, enables external interrupt 0.
SFR: IP (Interrupt Priority Low):
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
-
-
PT2
PS
PT1
PX1
PT0
PX0
PT2: If set, Set priority for timer2 interrupt higher
PS: If set, Set priority for serial port interrupt higher
PT1: If set, Set priority for timer1 interrupt higher
PX1: If set, Set priority for external interrupt 1 higher
PT0: If set, Set priority for timer0 interrupt higher
PX0: If set, Set priority for external interrupt 0 higher
SFR: IPH (Interrupt Priority High):
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
PX3H
PX2H
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
PX3H: If set, Set priority for external interrupt 3 highest
PX2H: If set, Set priority for external interrupt 2 highest
PT2H: If set, Set priority for timer2 interrupt highest
PSH:
If set, Set priority for serial port interrupt highest
PT1H: If set, Set priority for timer1 interrupt highest
PX1H: If set, Set priority for external interrupt 1 highest
PT0H: If set, Set priority for timer0 interrupt highest
PX0H: If set, Set priority for external interrupt 0 highest
MEGAWIN
MPC89x53A Data Sheet
21
MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
