SFR:
SCMD
(Sequential
Command Data register for ISP)
:
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
ISP-Command (Device ID)
SCMD
is the command port for triggering ISP activity. If SCMD is filled with sequential
46h, B9h
and if
ISPCR.7 = 1, ISP activity will be triggered.
When this register is read, the device ID of MPC89x53A will be returned (2 bytes). The MSB byte of DID
is
F0h
and LSB byte
04h.
IFADRL[0] is used to select HIGH/LOW byte of DID.
SFR:
ISPCR
(ISP
Control register):
Bit-7
ISPEN
Bit-6
SWBS
Bit-5
SWRST
Bit-4
-
Bit-3
-
Bit-2
Bit-1
WAIT
Bit-0
ISPEN:
ISP function enabling bit
0:
= Disable ISP program to change flash
1:
= Enable ISP program to change flash
SWBS:
Secondary Booting program selecting
0: = Boot from main-memory.
1: = Boot from ISP memory.
SWRST:
software reset trigger
0: = No operation
1: = Generate software system reset. It will be cleared by hardware automatically.
Notice:
Software reset actions could reset other SFR, but it never influences bits ISPEN and
SWBS. The ISPEN and SWBS only will be reset by power-up action, not software reset.
WAIT:
Waiting time selection while the flash is busy.
CPU Wait time (Machine Cycle)
Page Erase
Program
Read
Recommended
System clock
43769
240
43
40M
21885
120
22
20M
10942
60
11
10M
5471
30
6
5M
ISPCR[2:0]
000
001
010
011
Procedures demonstrating ISP function
IFMT
←
xxxxx011
b
ISPCR
←
100xx010
b
IFADRH
←
(page address high byte)
IFADRL
←
(page address low byte)
SCMD
←
46h
SCMD
←
B9h
(CPU progressing will be hold here )
(CPU continues)
/* choice page-erasing command */
/* set ISPEN=1 to enable flash change.
set WAIT=010, 10942 MC; assumed 10M X’s*/
/* specify the address of the page to be erased */
/* trig ISP activity */
Erase a specific flash page
MEGAWIN
MPC89x53A Data Sheet
29
MEGAWIN [ MEGAWIN TECHNOLOGY CO., LTD ]
