EVB71120
300 to 930MHz Receiver
Evaluation Board Description
3.2 Averaging Data Slicer Configured for Bi-Phase Codes
jumpers
LNA1 LNA2
ROI
ENRX
DTAO CLKO
RSSI
1
3
5 6
1 2 3
2
1 2 3 4
7 8
CRO
VCC
XTAL
10.7MHz
455kHz
RFSEL
Ω
jumper pads
0
CX
CRS
CF3
C3
L1
24
23
22
21
20
1
2
3
4
5
6
7
8
RSSI
LNAI1
VEE
CINT
VCC
PDN
PDP
SLC
L2
LNAO1
MIXP
C5
C6
C4
VCC
CB2
VCC
MLX71120
CB3
MIXN
LNAO2
CSL
32L QFN 5x5
19
L3
DFO 18
VEE
CB0
1
3
L4
LNAI2
17
DF1
CF1
SAWFIL
4
6
VCC
GND
9
10
11
12
13
14
15 16
C8
C7
SCLSEL
DFO
CF2
CIF
CERFIL
CB1
ASK
jumpers
FSK
Fig. 6: Circuit schematic
39012 71120 01
Rev. 003
Page 12 of 18
EVB Description
Jan/08