EVB71121
300 to 930MHz Receiver
Evaluation Board Description
2
Frequency Planning
Because of the double conversion architecture that employs two mixers and two IF signals, there are four
different combinations for injecting the LO1 and LO2 signals:
LO1 high side and LO2 high side:
LO1 high side and LO2 low side:
LO1 low side and LO2 high side:
LO1 low side and LO2 low side:
receiving at f
RF
(high-high)
receiving at f
RF
(high-low)
receiving at f
RF
(low-high)
receiving at f
RF
(low-low)
As a result, four different radio frequencies (RFs) could yield one and the same second IF (IF2). Fig. 2
shows this for the case of receiving at f
RF
(high-high). In the example of Fig. 2, the image signals at f
RF
(low-
high) and f
RF
(low-low) are suppressed by the bandpass characteristic provided by the RF front-end. The
bandpass shape can be achieved either with a SAW filter (featuring just a couple of MHz bandwidth), or by
the tank circuits at the LNA input and output (this typically yields 30 to 60MHz bandwidth). In any case, the
high value of the first IF (IF1) helps to suppress the image signals at f
RF
(low-high) and f
RF
(low-low).
The two remaining signals at IF1 resulting from f
RF
(high-high) and f
RF
(high-low) are entering the second
mixer MIX2. This mixer features image rejection with so-called single-sideband (SSB) selection. This means
either the upper or lower sideband of IF1 can be selected. In the example of Fig. 2, LO2 high-side injection
has been chosen to select the IF2 signal resulting from f
RF
(high-high).
f
RF
Fig. 2:
Y
R
A
IN
IM
L
E
R
P
f
LO2
f
LO2
f
RF
f
LO1
f
RF
f
RF
The four receiving frequencies in a double conversion superhet receiver
It can be seen from the block diagram of Fig. 1 that there is a fixed relationship between the LO signal
frequencies (f
LO1
, f
LO2
) and the reference oscillator frequency f
RO
.
f
LO1
=
N
1
⋅
f
LO2
f
LO2
=
N
2
⋅
f
RO
The operating frequency of the internal IF filter (IFF) and FSK demodulator (FSK DEMOD) is 1.8MHz.
Therefore the second IF (IF2) is set to 1.8MHz as well.
39012 71121 01
Rev. 003
Page 6 of 18
EVB Description
Jan/08
MELEXIS [ Melexis Microelectronic Systems ]
