EVB71122
300 to 930MHz Receiver
Evaluation Board Description
4.1.3
Peak Detector Data Slicer Configured for NRZ Codes
MFO
DFO
1 2 3 4 5
DTAO
VCC
RS1
1 2 3
1 2
CB3
RB0
XTAL
CX
VCCDIG
21
ROI
24
MFO
23
DTAO
22
VEEDIG
20
RS2
MFO
GND
SCLK
SDTA
SDEN
A/SCLK
19
B/SDTA
18
L1
C1
50
Y
R
A
IN
IM
L
E
R
P
C12
26
PDN
LF
15
27
DFO
28
DF1
29
DF2
VCCVCO
14
TNK2
13
TNK1
12
C11
25
PDP
C/SDEN
17
ENRX
16
RS3
CF2
RF
CF1
C8
C9
MLX71122
L0
CB2
30
VEEANA
31
LNAI
SLC
VEEVCO
11
VEELNA
VCCANA
VEEIF
SPISEL
1
3
SAWFIL
4
6
L2
RBS
RSSI
C2
RBIAS
10
9
LNAO
MIXN
MIXP
MODSEL
RSSI
GND VCC
1 2
1
2
3
4
5
6
7
8
12
L3
C5
C6
C4
C7
CB0
CB1
Fig. 7:
Application circuit for SPI Mode (peak detector option)
Note
•
EVB71122 default population is SPI mode
39012 71122 01
Rev. 001
Page 22 of 32
VCC
EVB Description
Sept/06