EVB71122
300 to 930MHz Receiver
Evaluation Board Description
3
Register Description
The following tables are to describe the functionality of the registers.
Sec. 4.1 provides a register overview with all the control words R0 to R7. The subsequent sections. 4.1.1 to
4.1.8 show the content of the control words in more detail.
Programming the registers requires SPI mode (SPISEL = 1). Default settings are for ABC mode.
3.1
Register Overview
DATA
LSB
10
9
8
7
6
5
4
3
2
1
0
CONTROL
WORD
MSB
Bit No.
11
LATCH
ADDRESS
MSB
LSB
default
1
DTAPOL
0
SLCSEL
1
SSBSEL
1
DEMGAIN
1
IFFGAIN
[ 1 :0 ]
0
0
MIX2GAIN
0
MIX1GAIN
1
LNAGAIN
[1 : 0 ]
0
0
0
OPMODE
[1:0]
0
0
0
R0
Bit No.
11
10
default
1
SHOWLD
R1
Bit No.
11
10
default
1
N
[6:0]
A
[4:0]
Y
R
A
IN
IM
L
E
R
P
9
8
7
6
5
4
3
2
1
0
MSB
read/
write
LSB
0
0
0
1
0
1
1
0
1
0
0
0
0
1
VCORANGE
PRESCUR
VCOCUR
LDMODE
VCOBUF
PFDPOL
LDTIME
[ 1 :0 ]
CPCUR
[1:0]
LDERR
read/
write
9
8
7
6
5
4
3
2
1
0
MSB
LSB
1
1
0
1
1
1
0
1
1
0
0
0
1
0
R2
Bit No.
11
10
9
read/
write
8
7
6
5
4
3
2
1
0
MSB
LSB
default
0
1
0
MFO
[3:0]
0
0
AGCDEL
[1:0]
0
0
AGCEN
0
LO2DIV
0
0
0
N
[ 10 : 7 ]
0
0
1
1
R3
read/
write
39012 71122 01
Rev. 001
Page 13 of 32
EVB Description
Sept/06
MELEXIS [ Melexis Microelectronic Systems ]
