EVB71122
300 to 930MHz Receiver
Evaluation Board Description
3.1.1
Control Word R0
Name
Bits
00
01
10
11
00
01
10
11
Description
operation mode
OPMODE
[1:0]
shutdown
receive mode
reference oscillator & BIAS only
synthesizer only
lowest gain
low gain
high gain
highest gain
LNA gain
(-18dB)
(-4dB)
(0dB)
(+2dB)
1
st
Mixer gain
MIX1GAIN
[4]
0
1
0
1
high gain
low gain
high gain
low gain
(14dB)
(0dB)
2
nd
Mixer gain
MIX2GAIN
[5]
(9dB)
(-2dB)
#default
#default
LNAGAIN
[3:2]
#default
gain values are relative to gain at default
#default
IFFGAIN
[7:6]
DEMGAIN
[8]
SSBSEL
[9]
Y
R
A
IN
IM
L
E
R
P
intermediate frequency filter gain
(-14dB)
(-6dB)
(0dB)
(+6dB)
00
01
10
11
0
1
0
1
lowest gain
low gain
high gain
highest gain
low gain
high gain
demodulator gain
(~ 4mV/kHz)
(~ 15mV/kHz)
single side band selection
upper side band
lower side band
Internal IF2 = 2MHz
#default
#default
LO2 low-side inj. (IF1 = LO2 + IF2)
LO2 high-side inj. (IF1 = LO2 – IF2)
slicer mode select
#default
SLCSEL
[9]
0
1
0
averaging Data Slicer mode
peak detector Data Slicer mode
data output polarity OA2
inverted
‘1’ for space at ASK or f
min
at FSK, ‘0’ for mark at ASK or f
max
at FSK
#default
DTAPOL
[11]
1
normal
‘0’ for space at ASK or f
min
at FSK, ‘1’ for mark at ASK or f
max
at FSK
#default
39012 71122 01
Rev. 001
Page 15 of 32
EVB Description
Sept/06
MELEXIS [ Melexis Microelectronic Systems ]
