MLX81100
LIN Slave for FET Control
1. Functional Diagram
CLKO
RTG
PS
VDD5V
POR
VS
RC-OSC.
GND
CWD
VDRV
5V/1.8V
Supply
300kHz
Voltage
Monitor
V1V8
fRC
Aux. Supply
Analog
Watchdog
Temp
SW2
Diff.
Amp
Reset
SHNT_L
SW0
BRMID1
Diff.
Amp
Ref. Mux
VS/2
BRMID1
SW1
BRMID2
Diff.
Amp
12V Ref
10 bit ADC
VS/2
BRMID2
GND
GND
MUX
VS/2
SW6
SW0 … SW7
VS/2
SW7
I/O Register
Pre-driver
Control
CP
SW0
Internal Communication Interface
Pre-
driver
High
HSBC1
HS1
Internal Communication Interface
PWM Control
50Hz...100kHz
Side 1
BRMID1
SW1
SW2
SW3
SW4
SW5
SW6
MelexCM
Dual Compare
Dual Compare
Dual Compare
CP
fPLL
PWMO
Prescaler
Prescaler
Prescaler
Compare on/off
Compare on/off
Compare on/off
Pre-
driver
High
HSBC2
HS2
16 bit TIMER
fOSC, fOSC/16,
16 bit TIMER
fOSC, fOSC/16,
16 bit TIMER
fOSC, fOSC/16,
fOSC/256
fOSC/256
fOSC/256
8 bit Counter
8 bit Counter
8wbitihtPCeroioud nretgeisrter
Side 2
Dual Capture
Watchdog
BRMID2
with Period register
with Period register
Dual Capture
Dual Capture
Pre-
driver
Low
Clock
Clock
Clock
fPLL
Interrrupt
Controller
devider
devider
devider
LS1
LS2
Side 1
RAM
Pre-
driver
Low
2kbyte
Appl. CPU
MLX16
UART
SPI
Side 2
M
M
U
SW7
Flash
32kbyte
with ECC
Comm. CPU
MLX4
EEPROM
128byte
fOSC
fRC
Test
controller
PLL
LIN-SBI
(1.3 and 2.0)
fPLL
LIN-
PHY
30MHz
LIN
Multi-
CPU
debugger
GND
GND
External Communication Interface
IO0 IO1 IO2 IO3 IO4 IO5
TI0 TI1 TO
Figure 1- Block diagram
MLX81100 – Product Abstract
Page 3 of 15
July 2007
Rev 015
MELEXIS [ Melexis Microelectronic Systems ]
