KS8995XA
Integrated 5-Port 10/100 QoS Switch
Rev 2.6
General Description
The KS8995XA is a highly integrated Layer-2 quality of
service (QoS) switch with optimized bill of materials
(BOM) cost for low port count, cost-sensitive
10/100Mbps switch systems. It also provides an
extensive feature set including three different QoS
priority schemes, a dual MII interface for BOM cost
reduction, rate limiting to offload CPU tasks, software
and hardware power-down, a MDC/MDIO control
interface and port mirroring/monitoring to effectively
address both current and emerging Fast Ethernet
applications.
The KS8995XA contains five 10/100 transceivers with
patented mixed-signal low-power technology, five media
access control (MAC) units, a high-speed non-blocking
switch fabric, a dedicated address lookup engine, and
an on-chip frame buffer memory.
All PHY units support 10BASE-T and 100BASE-TX. In
addition, two of the PHY units support 100BaseFX
(Ports 4 and 5).
Functional Diagram
Auto
MDI/MDI-X
Auto
MDI/MDI-X
Auto
MDI/MDI-X
Auto
MDI/MDI-X
Auto
MDI/MDI-X
MII-P5
MDC, MDI/O
MII-SW or SNI
LED0[5:1]
LED1[5:1]
LED2[5:1]
10/100
T/Tx 1
10/100
T/Tx 2
10/100
T/Tx 3
10/100
T/Tx/Fx 4
10/100
T/Tx/Fx 5
10/100
MAC 1
FIFO, Flow Control, VLAN Tagging, Priority
1K Look-Up
Engine
Queue
Mgmnt
10/100
MAC 2
10/100
MAC 3
10/100
MAC 4
10/100
MAC 5
SNI
Buffer
Mgmnt
Frame
Buffers
LED I/F
Control
Registers
KS8995XA
EEPROM
I/F
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
September 2008
M9999-091508
MICREL [ MICREL SEMICONDUCTOR ]
