ML2722
TRANSMIT RF BUFFER
P
OUT
Driver amplifier output power
Driver amplifier output return
loss
TRANSMIT MODULATION
f
DEV
f
OS
Modulation Deviation, internal
VCO
Modulation center frequency
offset
5 consecutive 1 or 0 bits
Between 50
µs
and 10 ms after PAON
high
400
-100
460
560
+100
kHz
kHz
When matched into 50Ω
902 to 928 MHz
-4.5
-1.0
14
+2.0
dBm
dB
TRANSMIT DATA FILTER
BW
TX
Transmit data filter bandwidth
3dB Bandwidth
1.4
MHz
INTERFACE LOGIC LEVELS
V
IH
V
IL
I
B
C
IN
V
OH
V
OL
Input high voltage
Input low voltage
Input bias current
Input capacitance
DOUT high voltage
DOUT low voltage
measured at 1MHz
Sourcing 0.1 mA
Typical value assumes 3.3V VDD
Sinking 0.1 mA
VDD
-
0.6
-5
0
4
3.08
0.18
0.6
never exceed VDD
0.75
*
VDD
VDD
V
V
µA
pF
V
V
0.25
*
VDD
5
6
INTERFACE TIMING
t
RX2PA
t
TX2EN
t
RXEN
t
XCEN
RX to TX switching time
TX to RX switching time
Channel switching time
Chip enable time
Time from RXON low to PAON high
Time from RXON high to receiver
enabled
Time from write to PLL tuning register
(EN high) to receiver enabled
From XCEN high to receiver enabled
with continuous reference applied
62.5
72
320
320
70
80
342
342
µs
µs
µs
µs
Note 1: Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
DS2722-F-05
FINAL DATASHEET
DECEMBER 2003
6