ML2281, ML2282, ML2284, ML2288
ML2288 Timing
1
CLOCK (CLK)
t
SET-UP
CHIP SELECT (CS)
ADDRESS MUX
START
BIT
DATA IN (DI)
SGL/DIF SELECT
BIT 1
SAR STATUS (SARS) HI-Z
MSB FIRST DATA
SE
= “0”
DATA OUT (DO)
HI-Z
7
6
(MSB)
5
4
3
2
1
0
(LSB)
1
2
3
4
5
6
t
SET-UP
DATA HELD
7
(MSB)
LSB FIRST DATA
HI-Z
ODD/ SELECT
SIGN BIT 0
DON’T CARE (DI DISABLED UNTIL NEXT CONVERSION CYCLE)
A/D CONVERSION IN PROCESS
HI-Z
OUTPUT DATA
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
USING
SE
TO CONTROL
LSB FIRST
OUTPUT DO
LINEARITY ERROR (LSB)
�½
SE
MSB FIRST DATA
HI-Z
SAMPLE & HOLD
ACQUISITION (t
ACQ
)
LSB FIRST DATA
HI-Z
7 6
(MSB)
5
4
3
2
1
0
(LSB)
1
2
3
4
5
6
7
(MSB)
Figure 2. Timing Diagrams (Continued)
1.0
V
CC
= 5V
V
REF
= 5V
0.75
0.5
–55 C
0.25
25 C
125 C
0
0
0.01
0.1
1
CLOCK FREQUENCY (MHz)
Figure 3. Linearity Error vs f
CLK
9
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
