欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML2724 参数 Datasheet PDF下载

ML2724图片预览
型号: ML2724
PDF下载: 下载PDF文件 查看货源
内容描述: 2.4GHz的低中频1.5Mbps的FSK收发器最终数据表 [2.4GHz Low-IF 1.5Mbps FSK Transceiver Final Datasheet]
分类和应用:
文件页数/大小: 26 页 / 964 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
 浏览型号ML2724的Datasheet PDF文件第5页浏览型号ML2724的Datasheet PDF文件第6页浏览型号ML2724的Datasheet PDF文件第7页浏览型号ML2724的Datasheet PDF文件第8页浏览型号ML2724的Datasheet PDF文件第10页浏览型号ML2724的Datasheet PDF文件第11页浏览型号ML2724的Datasheet PDF文件第12页浏览型号ML2724的Datasheet PDF文件第13页  
ML2724
PIN
22
SIGNAL
NAME
TXOB
I/O
O (analog)
FUNCTION
Complementary TX RF open-collector
output. This output requires a DC path to
VCCA. For single-ended output
applications, this pin should be
connected to a dummy load that includes
a DC path to VCCA.
DIAGRAM
TXO
21
TXOB
22
18
GNDRF
DATA
7
AOUT
A (analog)
Multi-function Output. In Analog output
mode this is output drives an off chip
data slicer. In Transmit power control
mode this is an open drain output, which
is pulled low when the TPC bit is serial
register #1, is clear. Transitions on TPC
are synchronized to the falling edge of
RXON. In analog test modes this pin and
the RSSI output become test access
points controlled by the serial control
bus.
TPQ
MUX
VDD
31
TPC
TPC
MUX
7
AOUT
100
8
VSS
8
VSS
AOUT
MUX
30
DIN
I (CMOS)
Transmit Data Input. Drives the transmit
pulse shaping circuits. Serial digital data
on this pin becomes FSK modulation on
the Transmit RF output. The logic timing
on this pin controls data timing. Internal
circuits determine the modulation
deviation. This is a standard CMOS input
referenced to VDD and VSS.
Serial digital output after demodulation,
chip rate filtering and center data slicing.
A CMOS level output (VSS to VDD) with
controlled slew rates. A low drive output
designed to drive a PCB trace and a
CMOS logic input while generating
minimal RFI. In digital test modes this pin
becomes a test access port controlled by
the serial control bus.
See Pin 1 below.
32
DOUT
O (CMOS)
VDD
31
250
32 DOUT
8
VSS
DS2724-F-01
FINAL DATASHEET
APRIL 2003
9