ML4428
START-UP SEQUENCING
When the motor is initially at rest, it is generating no
back-EMF. Because a back-EMF signal is required for
closed loop commutation, the motor must be started by
other means until a velocity sufficient to generate some
back-EMF is attained.
Start
For RC
VCO
voltages of less than 0.6V the ML4428 will
send 6 sample pulses to the motor to determine the rotor
position and drive the proper windings to produce desired
rotation. This will result in motor acceleration until the
RC
VCO
pin achieves 0.6V and closed loop operation
begins. This technique results in zero reverse rotation and
minimizes start-up time. The sample time pulses are set by
C
SNS
and the initial sample interval is set by R
INIT
. This
sense technique is not effective for air core motors, since a
minimum of 30% inductance difference must occur when
the motor moves.
Direction
The direction of motor rotation is controlled by the
commutation states as given in Table 1. The state
sequence is controlled by the F/R.
T
OFF
(µs)
Speed Control
The speed control section of the ML4428 is detailed in
Figure 8. The two transconductance amplifiers with
outputs at C
SC
and C
ISC
each have a gm of 0.23mmhos.
The bandwidth of the current feedback component of the
speed control is set at C
ISC
as follows:
f
3dB
4
5
2.3
×
10
−
=
3.66
×
10
−
=
2
π
C
ISC
C
ISC
For f
3dB
= 50kHz, C
ISC
would be 730pF. The filter
components on the C
SC
pin set the dominant pole in the
system and should have a bandwidth of about 10% of the
position filter on the RC
VCO
pin. Typically this is in the 1
to 10Hz range.
60
50
40
Run
When the RC
VCO
pin exceeds 0.6V the device will enter
run mode. At this time the motor speed should be about
8% FRPM
MAX
and be high enough to generate a
detectable BEMF and allow closed loop operation to
begin. The commutation position compensation has been
previously discussed.
The motor will continue to accelerate as long as the
voltage on the RC
VCO
is less than the voltage on V
SPEED
.
During this time the motor will receive full N-channel
drive limited only by I
LIMIT
. As the voltage on RC
VCO
approaches that of V
SPEED
the C
ISC
capacitor will charge
and begin to control the gate drive to the N-channel
transistor by setting a level for comparison on the 25kHz
PWM saw tooth waveform generated on C
PWM
. The
compensation of the speed loop is accomplished on C
SC
and on C
ISC
which are outputs of transconductance
amplifiers with a gm = 2.3
¥
10
–4
.
�½
30
20
10
0
0
100
200
300
C
IOS
(pF)
400
500
Note: 100pF gives 10µs, 200pF gives 20µs, etc.
Slope
=
dT
=
dV
=
5V
=
100k
Ω
50
µ
A
C
i
Figure 7. I
LIMIT
Output Off-Time vs. C
OS
.
C
SC
5
0.23mmho
V
SPEED
8
RC
VCO
20
+
+
–
–
LEVEL
SHIFT
+1.4V
+
C
PWM
6
–
0.23mmho
C
ISC
21
LINEAR CONTROL
TO LOW-SIDE
GATE DRIVE
MODE
SELECT
I
SNS
1
PWM CONTROL
TO COMMUTATION
LOGIC
Figure 8. Speed Control Block Diagram.
11
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
