ML4622, ML4624
PIN DESCRIPTION
NAME
TTL LINK MON
FUNCTION
TTL Link Monitor output. Signal is
low when the V
IN
+, V
IN
– inputs
exceed the minimum threshold,
which is set by a voltage on the
V
TH
ADJ pin. Signal is high when the
input signal level is below the
threshold. Capable of driving a 10mA
LED indicator. This pin can be tied to
CMP ENABLE.
A low voltage at this TTL input pin
enables both the ECL and the TTL
outputs. A high TTL voltage disables
the comparator output with ECL+
high, ECL– low, and TTL OUT high.
This input pin should be capacitively
coupled to the input source or to
filtered ground. (The input resistance
is approximately 1.6kΩ.)
This input pin should be capacitively
coupled to the input source or to
filtered ground. (The input resistance
is approximately 1.6kΩ.)
The ECL comparator negative output.
Has internal pull down resistor.
External pull downs are not required
unless driving a large capacitive
load.
The ECL comparator positive output.
Has internal pull down resistor.
External pull downs are not required
unless driving a large capacitive
load.
The negative supply for the TTL
comparator stage. If the TTL output is
not necessary, connect GND TTL
to V
CC
.
NAME
V
CC
TTL
FUNCTION
The positive supply for the TTL
comparator stage. If the TTL output is
not necessary, connect V
CC
TTL to
V
CC
. (ML4624 only)
TTL data output.
An external capacitor on this pin
integrates an error signal which nulls
the offset of the input amplifier. If the
DC feedback loop is not being used,
this pin should be connected to V
REF
.
A capacitor from this pin to CF1
controls the maximum bandwidth of
the amplifier.
Connect to CF2 through a capacitor.
Negative supply. Connect to –5.2V
for ECL operation, or to ground for
TTL or raised ECL operation.
This input pin sets the link monitor
threshold.
A 2.5V reference with respect to
GND.
A capacitor from this pin to V
CC
determines the Link Monitor
response time.
Positive supply. Connect to ground
for negative ECL operation, or to 5V
for TTL or raised ECL operation.
TTL OUT
V
DC
CMP ENABLE
CF2
V
IN
–
CF1
GND
V
IN
+
V
TH
ADJ
V
REF
C
TIMER
ECL–
ECL+
V
CC
GND TTL
3
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
