ML4802
PIN CONFIGURATION
ML4802
16-Pin PDIP (P16)
16-Pin Narrow SOIC (S16N)
IEAO
IAC
ISENSE
VRMS
SS
VDC
RT/CT
RAMP 1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VEAO
VFB
VREF
VCC
PFC OUT
PWM OUT
GND
RAMP 2
TOP VIEW
PIN DESCRIPTION
PIN
NAME
FUNCTION
PIN
NAME
FUNCTION
1
2
3
4
5
6
7
8
IEAO
IAC
ISENSE
VRMS
SS
VDC
RT/CT
RAMP 1
PFC current error amplifier output
PFC gain control reference input
9
10
RAMP 2
GND
PWM current feedback/overcurrent
limit input
Ground
Current sense input to the PFC current
limit comparator
Input for PFC RMS line voltage
compensation
Connection point for the PWM soft start
capacitor
PWM feedback voltage input
11
12
13
14
15
PWM OUT PWM driver output
PFC OUT
VCC
VREF
VFB
VEAO
PFC driver output
Positive supply input
Buffered output for the internal 7.5V
reference
PFC voltage error amplifier input
PFC voltage error amplifier output
Connection for master (PWM) oscillator
frequency setting components
PFC ramp input
16
2
Datasheet
August 2000
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
