欢迎访问ic37.com |
会员登录 免费注册
发布采购

ML4823IP 参数 Datasheet PDF下载

ML4823IP图片预览
型号: ML4823IP
PDF下载: 下载PDF文件 查看货源
内容描述: 高频电源控制器 [High Frequency Power Supply Controller]
分类和应用: 控制器
文件页数/大小: 9 页 / 171 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
 浏览型号ML4823IP的Datasheet PDF文件第2页浏览型号ML4823IP的Datasheet PDF文件第3页浏览型号ML4823IP的Datasheet PDF文件第4页浏览型号ML4823IP的Datasheet PDF文件第5页浏览型号ML4823IP的Datasheet PDF文件第6页浏览型号ML4823IP的Datasheet PDF文件第7页浏览型号ML4823IP的Datasheet PDF文件第8页浏览型号ML4823IP的Datasheet PDF文件第9页  
May 1997
ML4823*
High Frequency Power Supply Controller
GENERAL DESCRIPTION
The ML4823 High Frequency PWM Controller is an IC
controller optimized for use in Switch Mode Power
Supply designs running at frequencies to 1MHz.
Propagation delays are minimal through the comparators
and logic for reliable high frequency operation while slew
rate and bandwidth are maximized on the error amplifier.
This controller is designed for single-ended applications
using voltage or current mode and provides for input
voltage feed forward.
A 1V threshold current limit comparator provides cycle-
by-cycle current limit and exceeding a 1.4V threshold
initiates a soft-start cycle. The soft start pin doubles as a
maximum duty cycle clamp. All logic is fully latched to
provide jitter-free operation and prevent multiple pulsing.
An under-voltage lockout circuit with 800mV of hysteresis
assures low startup current and drives the outputs low
during fault conditions.
This controller is an improved second source for the
UC3823 controller; however, the ML4823 includes
features not found on the 3823. These features are set in
italics.
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
s
Practical operation at switching frequencies to 1.0MHz
High current (2A peak) totem pole output
Wide bandwidth error amplifier
Fully latched logic with double pulse suppression
Pulse-by-pulse current limiting
Soft start and max. duty cycle control
Under voltage lockout with hysteresis
5.1V trimmed bandgap reference
Low start-up current (1.1mA)
Pin compatible improved replacement for UC3823
Fast shut down path from current limit to output
Soft start latch ensures full soft start cycle
Outputs pull low for undervoltage lockout
*Some Packages Are Obsolete
BLOCK DIAGRAM
(Pin Configuration Shown for 16-Pin Version)
5
6
R
T
C
T
OSC
CLOCK OUT
4
7
3
RAMP
E/A OUT
1.25V
+
R
+
COMP
S
Q
2
1
NI
INV
+
ERROR
AMP
V+
POWER V
C
OUTPUT
POWER GND
+
+
ENABLE
V
REF
V
REF
GEN
+
9V
INTERNAL
BIAS
V
CC
SIGNAL GND
4V
13
14
12
8
SOFT START
I
LIM
REF
I
LIM
/S.D.
+
R
+
Q
S
UNDER
VOLTAGE
LOCKOUT
5.1V
11
9
1V
5.1V V
REF
16
1.4V
15
10
1