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ML6401CS-1 参数 Datasheet PDF下载

ML6401CS-1图片预览
型号: ML6401CS-1
PDF下载: 下载PDF文件 查看货源
内容描述: 8位20 MSPS A / D转换器 [8-Bit 20 MSPS A/D Converter]
分类和应用: 转换器光电二极管信息通信管理
文件页数/大小: 10 页 / 165 K
品牌: MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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March 1997
ML6401*
8-Bit 20 MSPS A/D Converter
GENERAL DESCRIPTION
The ML6401 is a single-chip 8-bit 20 MSPS BiCMOS Video
A/D Converter IC, incorporating a differential input track
and hold, clock generation circuitry, and reference voltage.
The input track and hold consists of a low (4pF)
capacitance input and a fast settling operational amplifier.
The A/D conversion is accomplished through a pipeline
approach, reducing the number of required comparators
and latches. The non-over-lapping clocks required for this
architecture are all internally generated. Clock generation
circuitry requires only one 50% duty cycle clock input.
The use of error correction throughout the A/D converter
improves DNL. All bias voltages and currents required by
the A/D converter are internally generated. The digital
outputs are three-stateable.
FEATURES
s
5.0V
±10%
single supply operation
s
Internal reference voltage
s
Power dissipation less than 200mW typical
s
Replaces TMC1175MC20 and AD775JR,
functionally compatible to Sony CXD1175AM/AP
s
16-pin reduced pin count packages
available: ML6401CS-3
s
Low input capacitance track and hold: 4pF
s
Onboard non-overlapping clock generation to
minimize external components
s
Three-state outputs and no missing codes
s
150MHz input track and hold
BLOCK DIAGRAM/TYPICAL APPLICATION
5V
VIDEO
INPUT
+
47µF
V
IN
0.1µF
ADC 2
1kΩ
1kΩ
SUB
DAC
AMP
10µF
+
V
IN
+
150MHz
T&H
ADC 1
*Some Packages Are End Of Life
VDD
A
VDD
A
VDD
A
VDD
D
VDD
D
OE
D7
D6
D5
75Ω
SUB
DAC
AMP
ADC 3
DIGITAL
ERROR
CORRECTION
D4
D3
VIN
-BIAS
1.5V
VREF
OUT
VREF
IN
INTERNAL
1.0V REFERENCES
CLOCK GENERATOR
D0
D2
D1
GND
A
GND
A
CLK
GND
D
GND
O
20MHz
1