P
POWER SO
rmance
High-Perfo
age
sipation Pack
Thermal Dis
FEATURING
November 1999
PRELIMINARY
ML6554
3A Bus Termination Regulator
GENERAL DESCRIPTION
The ML6554 switching regulator is designed to convert
voltage supplies ranging from 2.3V to 4V into a desired
output voltage or termination voltage for various
applications. The ML6554 can be implemented to
produce regulated output voltages in two different modes.
In the default mode, when the V
REF
pin is open, the
ML6554 output voltage is 50% of the voltage applied to
V
CCQ
. The ML6554 can also be used to produce various
user-defined voltages by forcing a voltage on the VREF
IN
pin. In this case, the output voltage follows the input
VREF
IN
voltage. The switching regulator is capable of
sourcing or sinking up to 3A of current while regulating an
output V
TT
voltage to within 3% or less.
The ML6554, used in conjunction with series termination
resistors, provides an excellent voltage source for active
termination schemes of high speed transmission lines as
those seen in high speed memory buses and distributed
backplane designs. The voltage output of the regulator
can be used as a termination voltage for other bus
interface standards such as SSTL, CMOS, Rambus
™
,
GTL+, VME, LV-CMOS, LV-TTL, and PECL.
FEATURES
s
s
s
s
Power SOP package
Can source and sink up to 3A, no heat sink required
Integrated Power MOSFETs
Generates termination voltages for SSTL-2 SDRAM,
SGRAM, or equivalent memories
Generates termination voltages for active termination
schemes for GTL+, Rambus, VME, LV-TTL, PECL and
other high speed logic
V
REF
input available for external voltage divider
Separate voltages for V
CCQ
and PV
DD
Buffered V
REF
output
V
OUT
of ±3% or less at 3A
Minimum external components
Shutdown for standby or suspend mode operation
Thermal Shutdown
»
130ºC
s
s
s
s
s
s
s
s
BLOCK DIAGRAM
15
16
14
1
9
VDD
12
2
7
VCCQ
AVCC
VREFOUT
OSCILLATOR/
RAMP
GENERATOR
VDD
SHDN
PVDD1
PVDD2
VL1
(VOUT)
3
200kΩ
+
–
VREF BUFFER
–
+
+
ERROR AMP
RAMP
COMPARATOR
S
R
Q
Q
VL2
(VOUT)
6
11
VREFIN
200kΩ
AGND
–
13
VFB
DGND
PGND1
PGND2
10
8
4
5
1