December 1998
ML6696*
100BASE-X Fiber Physical Layer
GENERAL DESCRIPTION
The ML6696 implements the complete physical layer of
the Fast Ethernet 100BASE-X standard for fiber media. The
device provides the MII (Media Independent Interface) for
interface to upper-layer silicon. The ML6696 integrates the
data quantizer and the LED driver, allowing the use of
low cost optical PMD components.
The ML6696 includes 4B/5B encoder/decoder, 125MHz
clock recovery/clock generation, LED driver, and a data
quantizer. The device also offers a power down mode
which results in total power consumption of less than 20mA.
The ML6696 is suitable for the current 100BASE-FX IEEE
803.2u standard defined using 1300nm optics, as well as
for the
proposed
100BASE-SX standard defined using lower
cost 820nm optics
FEATURES
s
s
s
s
s
s
s
100BASE-FX physical layer with MII
Optimal 100BASE-SX solution (draft standard)
Integrated data quantizer (post-amplifier)
Integrated LED driver
125MHz clock generation and recovery
4B/5B encoding/decoding
Power-down mode
* Some Packages Are Obsolete
BLOCK DIAGRAM
CLKREF
TXCLK
CLOCK
SYNTHESIZER
TXER
TXEN
TXD3
TXD2
TXD1
TXD0
MDC
MDIO
COL
CRS
CARRIER & COLLISION
LOGIC
MII SERIAL
MANAGEMENT
INTERFACE
PCS
TRANSMIT
STATE
MACHINE
AND
4B/5B ENCODER
IOUT
SERIALIZER
NRZ TO NRZI
ENCODER
IOUT
LED
DRIVER
RTSET
ECLK
INITIALIZATION
INTERFACE
EDIN
EDOUT
RXCLK
RXER
RXDV
RXD3
RXD2
RXD1
RXD0
CAPB
CAPDC
PCS
RECEIVE
STATE
MACHINE
AND
4B/5B DECODER
DESERIALIZER
CLOCK & DATA
RECOVERY
NRZI TO NRZ
ENCODER
DATA QUANTIZER
(POST AMPLIFIER)
VIN+
VIN–
LINK100
1
MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
