25AA320/25LC320/25C320
The following is a list of conditions under which the
write enable latch will be reset:
3.4
Write Enable (WREN) and Write
Disable (WRDI)
• Power-up
The 25XX320 contains a write enable latch.
See
• WRDIinstruction successfully executed
Table 3-3 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WRENinstruction will set the
latch, and the WRDIwill reset the latch.
• WRSRinstruction successfully executed
• WRITEinstruction successfully executed
FIGURE 3-4: WRITE ENABLE SEQUENCE
CS
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
0
1
1
0
High-Impedance
SO
FIGURE 3-5: WRITE DISABLE SEQUENCE
CS
0
1
2
3
4
5
6
7
SCK
SI
0
1
0
0
0
0
0
1
0
High-Impedance
SO
© 2008 Microchip Technology Inc.
DS21227F-page 9