93C46B
3.8
WRITE
3.9
Write All (WRAL)
The WRITE instruction is followed by 16 bits of data,
which are written into the specified address. After the
last data bit is clocked into the DI pin, the self-timed
auto-erase and programming cycle begins.
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (T
CSL
) and before the entire write cycle is complete.
DO at logical “0” indicates that programming is still in
progress. DO at logical “1” indicates that the register at
the specified address has been written with the data
specified and the device is ready for another instruc-
tion.
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
The WRAL cycle is completely self-timed and com-
mences at the rising clock edge of the last data bit.
Clocking of the CLK pin is not necessary after the
device has entered the WRAL cycle. The WRAL com-
mand does include an automatic ERAL cycle for the
device. Therefore, the WRAL instruction does not
require an ERAL instruction, but the chip must be in the
EWEN status.
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (T
CSL
).
FIGURE 3-7:
CS
WRITE TIMING
T
CSL
CLK
DI
1
0
1
An
•••
A0
Dx
•••
D0
T
SV
T
CZ
READY
DO
HIGH-Z
BUSY
HIGH-Z
Twc
FIGURE 3-8:
CS
WRAL TIMING
T
CSL
CLK
DI
1
0
0
0
1
X
•••
X
Dx
•••
D0
T
SV
T
CZ
DO
HIGH-Z
BUSY
READY
HIGH-Z
T
WL
©
1997 Microchip Technology Inc.
Preliminary
DS21172D-page 7
MICROCHIP [ MICROCHIP TECHNOLOGY ]
