PIC16C63A/65B/73B/74B
3.0
ARCHITECTURAL OVERVIEW
The high performance of the PIC16CXX family can be
attributed to a number of architectural features com-
monly found in RISC microprocessors. To begin with,
the PIC16CXX uses a Harvard architecture, in which
program and data are accessed from separate memo-
ries using separate buses. This improves bandwidth
over traditional von Neumann architecture, in which
program and data are fetched from the same memory
using the same bus. Separating program and data
buses further allows instructions to be sized differently
than the 8-bit wide data word. Instruction opcodes are
14-bits wide, making it possible to have all single word
instructions. A 14-bit wide program memory access
bus fetches a 14-bit instruction in a single cycle. A
two-stage pipeline overlaps fetch and execution of
instructions (Example 3-1). Consequently, most
instructions execute in a single cycle (200 ns @
20 MHz) except for program branches.
All devices covered by this data sheet contain
4K x 14-bit program memory and 192 x 8-bit data
memory.
The PIC16CXX can directly, or indirectly, address its
register files or data memory. All Special Function Reg-
isters, including the program counter, are mapped in
the data memory. The PIC16CXX has an orthogonal
(symmetrical) instruction set that makes it possible to
carry out any operation on any register using any
addressing mode. This symmetrical nature and lack of
‘special optimal situations’ make programming with the
PIC16CXX simple yet efficient. In addition, the learning
curve is reduced significantly.
PIC16CXX devices contain an 8-bit ALU and working
register. The ALU is a general purpose arithmetic unit.
It performs arithmetic and Boolean functions between
the data in the working register and any register file.
The ALU is 8-bits wide and capable of addition, sub-
traction, shift and logical operations. Unless otherwise
mentioned, arithmetic operations are two's comple-
ment in nature. In two-operand instructions, typically
one operand is the working register (W register). The
other operand is a file register or an immediate con-
stant. In single operand instructions, the operand is
either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC), and
Zero (Z) bits in the STATUS register. The C and DC bits
operate as a borrow bit and a digit borrow out bit,
respectively, in subtraction. See the
SUBLW
and
SUBWF
instructions for examples.
2000 Microchip Technology Inc.
DS30605C-page 9
MICROCHIP [ MICROCHIP TECHNOLOGY ]
