PIC16F62X
11.0
VOLTAGE REFERENCE
MODULE
11.1
Configuring the Voltage Reference
The Voltage Reference can output 16 distinct voltage
levels for each range.
The equations used to calculate the output of the
Voltage Reference are as follows:
if V
RR
= 1: V
REF
= (V
R
<3:0>/24) x V
DD
if V
RR
= 0: V
REF
= (V
DD
x 1/4) + (V
R
<3:0>/32) x V
DD
The setting time of the Voltage Reference must be
considered when changing the V
REF
output
to configure the Voltage Reference for an output volt-
age of 1.25V with V
DD
= 5.0V.
The Voltage Reference is a 16-tap resistor ladder
network that provides a selectable voltage reference.
The resistor ladder is segmented to provide two ranges
of V
REF
values and has a power-down function to
conserve power when the reference is not being used.
The VRCON register controls the operation of the
reference as shown in Figure 11-1. The block diagram
is given in Figure 11-2.
FIGURE 11-1:
R/W-0
V
REN
bit7
VRCON REGISTER(ADDRESS 9Fh)
R/W-0
V
RR
U-0
—
R/W-0
V
R3
R/W-0
V
R2
R/W-0
V
R1
R/W-0
V
R0
bit0
R/W-0
V
ROE
R = Readable bit
W = Writable bit
U = Unimplemented bit, read
as ’0’
-n = Value at POR reset
bit 7:
V
REN
:
V
REF
Enable
1
= V
REF
circuit powered on
0
= V
REF
circuit powered down, no I
DD
drain
V
ROE
:
V
REF
Output Enable
1
= V
REF
is output on RA2 pin
0
= V
REF
is disconnected from RA2 pin
V
RR
:
V
REF
Range selection
1
= Low Range
0
= High Range
Unimplemented:
Read as '0'
bit 6:
bit 5:
bit 4:
bit 3-0:
V
R
<3:0>:
V
REF
value selection 0
≤
V
R
[3:0]
≤
15
when V
RR
= 1: V
REF
= (V
R
<3:0>/ 24) * V
DD
when V
RR
= 0: V
REF
= 1/4 * V
DD
+ (V
R
<3:0>/ 32) * V
DD
FIGURE 11-2: VOLTAGE REFERENCE BLOCK DIAGRAM
16 Stages
V
REN
8R
R
R
R
R
8R
V
RR
V
R
3
V
REF
16-1 Analog Mux
V
R
0
(From VRCON<3:0>)
Note:
R is defined in Table 12-3.
©
1999 Microchip Technology Inc.
Preliminary
DS40300B-page 69