PIC16F87X
FIGURE 2-2: PIC16F874/873 PROGRAM
MEMORY MAP AND STACK
2.0
MEMORY ORGANIZATION
There are three memory blocks in each of these
PICmicro MCUs. The Program Memory and Data
Memory have separate buses so that concurrent
access can occur and is detailed in this section. The
EEPROM data memory block is detailed in
Section 4.0.
PC<12:0>
13
CALL, RETURN
RETFIE, RETLW
Additional information on device memory may be found
Stack Level 1
in the PICmicro
(DS33023).
Mid-Range Reference Manual,
Stack Level 2
2.1
Program Memory Organization
Stack Level 8
Reset Vector
The PIC16F87X devices have a 13-bit program counter
capable of addressing an 8K x 14 program memory
space. The PIC16F877/876 devices have 8K x 14
words of FLASH program memory and the PIC16F873/
874 devices have 4K x 14. Accessing a location above
the physically implemented address will cause a wrap-
around.
0000h
Interrupt Vector
Page 0
0004h
0005h
The reset vector is at 0000h and the interrupt vector is
at 0004h.
On-Chip
Program
Memory
07FFh
0800h
FIGURE 2-1: PIC16F877/876 PROGRAM
MEMORY MAP AND STACK
Page 1
0FFFh
1000h
PC<12:0>
13
CALL, RETURN
RETFIE, RETLW
1FFFh
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
0000h
Interrupt Vector
Page 0
0004h
0005h
07FFh
0800h
Page 1
On-Chip
Program
Memory
0FFFh
1000h
Page 2
Page 3
17FFh
1800h
1FFFh
1999 Microchip Technology Inc.
DS30292B-page 11
MICROCHIP [ MICROCHIP ]
