PIC16F688
Pin Diagram (PDIP, SOIC, TSSOP)
14-pin PDIP, SOIC, TSSOP
V
DD
RA5/T1CKI/OSC1/CLKIN
RA4/AN3/T1G/OSC2/CLKOUT
RA3/MCLR/V
PP
RC5/RX/DT
RC4/C2OUT/TX/CK
RC3/AN7
1
2
PIC16F688
3
4
5
6
7
14
13
12
11
10
9
8
V
SS
RA0/AN0/C1IN+/ICSPDAT/ULPWU
RA1/AN1/C1IN-/V
REF
/ICSPCLK
RA2/AN2/T0CKI/INT/C1OUT
RC0/AN4/C2IN+
RC1/AN5/C2IN-
RC2/AN6
TABLE 1:
I/O
RA0
RA1
RA2
RA3
RA4
RA5
RC0
RC1
RC2
RC3
RC4
RC5
—
—
Note 1:
Pin
13
12
11
4
3
2
10
9
8
7
6
5
1
14
PIC16F688 14-PIN SUMMARY (PDIP, SOIC, TSSOP)
Analog
AN0/ULPWU
AN1
AN2
—
AN3
—
AN4
AN5
AN6
AN7
—
—
—
—
Comparators
C1IN+
C1IN-
C1OUT
—
—
—
C2IN+
C2IN-
—
—
C2OUT
—
—
—
Timers
—
—
T0CKI
—
T1G
T1CKI
—
—
—
—
—
—
—
—
EUSART
—
—
—
—
—
—
—
—
—
—
TX/CK
RX/DT
—
—
Interrupt
IOC
IOC
IOC/INT
IOC
IOC
IOC
—
—
—
—
—
—
—
—
Pull-up
Y
Y
Y
Y
(1)
Y
Y
—
—
—
—
—
—
—
—
Basic
ICSPDAT
V
REF
/ICSPCLK
—
MCLR/V
PP
OSC2/CLKOUT
OSC1/CLKIN
—
—
—
—
—
—
V
DD
V
SS
Pull-up activated only with external MCLR configuration.
DS41203D-page 2
©
2007 Microchip Technology Inc.