256Mb, 512Mb, 1Gb, 2Gb: 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 22: WE#-Controlled Program AC Timing (8-Bit Mode)
3rd Cycle
t
WC
4th Cycle
Data Polling
t
WC
READ Cycle
A[MAX:0]/A-1
AAAh
t
AS
t
CS
t
CH
PA
t
AH
PA
t
E
CE#
t
GHWL
t
OE
OE#
t
WP
t
WPH
WE#
t
DS
t
WHWH1
t
DF
t
OH
DQ[7:0]
AOh
t
DH
PD
DQ7#
D
OUT
D
OUT
Notes:
1. Only the third and fourth cycles of the PROGRAM command are represented. The PRO-
GRAM command is followed by checking of the status register data polling bit and by a
READ operation that outputs the data (D
OUT
) programmed by the previous PROGRAM
command.
2. PA is the address of the memory location to be programmed. PD is the data to be pro-
grammed.
3. DQ7 is the complement of the data bit being programmed to DQ7 (See Data Polling Bit
[DQ7]).
4. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef849b4b09
m29ew_256mb_2gb.pdf - Rev. B 8/12 EN
63
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