Micron M25P40 Serial Flash Embedded Memory
WRITE DISABLE
WRITE DISABLE
The WRITE DISABLE command resets the write enable latch (WEL) bit.
The WRITE DISABLE command is entered by driving chip select (S#) LOW, sending the
command code, and then driving S# HIGH.
The WEL bit is reset under the following conditions:
•
•
•
•
•
Power-up
Completion of any ERASE operation
Completion of any PROGRAM operation
Completion of any WRITE REGISTER operation
Completion of WRITE DISABLE operation
Figure 8: WRITE DISABLE Command Sequence
0
C
S#
1
2
3
4
5
6
7
Command Bits
DQ[0]
MSB
DQ1
High-Z
0
0
0
0
0
1
0
0
LSB
Don’t Care
PDF: 09005aef8456654f
m25p40.pdf - Rev. Y 8/12 EN
19
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