128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
Table 3
Bus Operations
CE0, CE1,
CE21
STS DEFAULT
MODE
RP#
VIH
VIH
VIH
VIL
OE#2 WE#2 ADDRESS
VPEN
X
DQ3
DOUT
MODE
High-Z4
X
NOTES
Read Array
Output Disable
Standby
Enabled
Enabled
Disabled
X
VIL
VIH
X
VIH
VIH
X
X
X
X
X
5, 6, 7
X
High-Z
High-Z
High-Z
X
X
Reset/Power-Down
Mode
X
X
X
High-Z4
Read Identifier Codes
VIH
VIH
Enabled
Enabled
VIL
VIL
VIH
VIH
See
Figure 2
X
X
Note 8
Note 9
DOUT
High-Z4
High-Z4
Read Query
See
Table 7
Read Status (ISM off)
VIH
VIH
Enabled
Enabled
VIL
VIL
VIH
VIH
X
X
X
X
Read Status (ISM on)
DQ7
DOUT
DQ15–DQ8
DQ6–DQ0
High-Z
High-Z
Write
VIH
Enabled
VIH
VIL
X
VPENH
DIN
X
7, 10, 11
NOTE: 1. See Table 2 for valid CE configurations.
2. OE# and WE# should never be enabled simultaneously.
3. DQ refers to DQ0–DQ7 if BYTE# is LOW and DQ0–DQ15 if BYTE# is HIGH.
4. High-Z is VOH with an external pull-up resistor.
5. Refer to DC Characteristics. When VPEN ≤ VPENLK, memory contents can be read, but not altered.
6. X can be VIL or VIH for control and address pins, and VPENLK or VPENH for VPEN. See DC Characteristics for VPENLK and
VPENH voltages.
7. In default mode, STS is VOL when the ISM is executing internal block erase, program, or lock bit configuration
algorithms. It is VOH when the ISM is not busy, in block erase suspend mode (with programming inactive), program
suspendmode,orreset/power-downmode.
8. See Read Identifier Codes section for read identifier code data.
9. See Read Query Mode Command section for read query data.
10. Command writes involving block erase, program, or lock bit configuration are reliably executed when VPEN = VPENH and
VCC is within specification.
11. Refer to Table 4 for valid DIN during a WRITE operation.
128Mb, 64Mb, 32MbQ-FlashMemory
MT28F640J3_7.p65 – Rev. 6, Pub. 8/02
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.
©2002,MicronTechnology,Inc.
10
MICRON [ MICRON TECHNOLOGY ]
