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MT46H32M16 参数 Datasheet PDF下载

MT46H32M16图片预览
型号: MT46H32M16
PDF下载: 下载PDF文件 查看货源
内容描述: 移动双倍数据速率( DDR ) SDRAM [Mobile Double Data Rate (DDR) SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 3 页 / 114 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT46H32M16的Datasheet PDF文件第2页浏览型号MT46H32M16的Datasheet PDF文件第3页  
Advance‡
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile DDR SDRAM
Mobile Double Data Rate (DDR) SDRAM
MT46H32M16LF – 8 Meg x 16 x 4 Banks
MT46H16M32LF – 4 Meg x 32 x 4 Banks
For a complete data sheet, please refer to
Features
• V
DD
= +1.8V ±0.1V, V
DD
Q = +1.8V ±0.1V
• Bidirectional data strobe per byte of data (DQS)
• Internal, pipelined double data rate (DDR)
architecture; two data accesses per clock cycle
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center-
aligned with data for WRITEs
• Four internal banks for concurrent operation
• Data masks (DM) for masking write data–one mask
per byte
• Programmable burst lengths: 2, 4, 8, 16 or full page
• Concurrent auto precharge option is supported
• Auto refresh and self refresh modes
• 1.8V LVCMOS compatible inputs
• On-chip temperature sensor to control refresh rate
• Partial array self refresh (PASR)
• Deep power-down (DPD)
• Selectable output drive (DS)
• Clock stop capability
Figure 1: 60-Ball VFBGA Assignment
1
A
V
SS
DQ15
V
SS
Q
V
DD
Q
DQ0
V
DD
2
3
4
5
6
7
8
9
B
V
DD
Q
DQ13
DQ14
DQ1
DQ2
V
SS
Q
C
V
SS
Q
DQ11
DQ12
DQ3
DQ4
V
DD
Q
D
V
DD
Q
DQ9
DQ10
DQ5
DQ6
V
SS
Q
E
V
SS
Q
UDQS
DQ8
DQ7
LDQS
V
DD
Q
F
V
SS
UDM
NC
A13,
NC
LDM
V
DD
G
CKE
CK
CK#
WE#
CAS#
RAS#
H
A9
A11
A12
CS#
BA0
BA1
J
A6
A7
A8
A10/AP
A0
A1
K
V
SS
A4
A5
A2
A3
V
DD
Options
• V
DD
/V
DD
Q
• 1.8V/1.8V
• Configuration
• 32 Meg x 16(8 Meg x 16 x 4 banks)
• 16 Meg x 32 (4 Meg x 32 x 4 banks)
• Plastic Package
• 60-Ball VFBGA
1
• 90-Ball VFBGA
2
• Timing – Cycle Time
• 6ns @ CL = 3
• 7.5ns @ CL = 3
• 10ns @ CL = 3
• Operating Temperature Range
• Commercial (0° to +70°C)
• Industrial (-40°C to +85°C)
Marking
H
Table 1:
Configuration Addressing
32 Meg x 16
8 Meg x 16 x 4
8K
8K (A0–A12)
4 (BA0, BA1)
1K (A0–A9)
16 Meg x 32
4 Meg x 32 x 4
8K
8K (A0–A12)
4 (BA0, BA1)
512 (A0–A8)
32M16
16M32
TBD
Architecture
Configuration
Refresh Count
Row Addressing
Bank Addressing
Column Addressing
-6
-75
-10
None
IT
Notes:1. Only available for x16 configuration.
2. Only available for x32 configuration.
PDF: 09005aef818ff7c5/Source: 09005aef818ff7ae
MT46H32M16.fm - Rev. A 03/05 EN
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron
to meet Micron’s production data sheet specifications.