512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 40:
Self Refresh Mode
T0
CLK
tCK
T1
tCH
tCL
T2
((
))
((
))
Tn + 1
tCKS
> tRAS
((
))
((
))
((
))
((
))
To + 1
To + 2
CKE
tCKS
tCMS
COMMAND
tCKH
tCMH
NOP
AUTO
REFRESH
((
))
PRECHARGE
((
))
((
))
((
))
((
))
((
))
((
))
NOP
( (
((
))
AUTO
REFRESH
))
DQM
((
))
((
))
((
))
((
))
((
))
((
))
A0–A9,
A11, A12
ALL BANKS
A10
SINGLE BANK
((
))
((
))
t
AS
BA0, BA1
tAH
((
))
((
))
((
))
((
))
BANK(S)
DQ
High-Z
tRP
Precharge all
active banks
Enter self refresh mode
((
))
((
))
tXSR
Exit self refresh mode
(Restart refresh time base)
DON’T CARE
CLK stable prior to exiting
self refresh mode
Notes:
1. Each AUTO REFRESH command performs a REFRESH cycle. Back-to-back commands are not
required. See Table 11 on page 47.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
57
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©2005 Micron Technology, Inc. All rights reserved.
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