512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
Timing Diagrams
Figure 54:
WRITE – DQM Operation
T0
CLK
tCKS
CKE
tCMS
COMMAND
tCMH
NOP
WRITE
NOP
NOP
NOP
NOP
NOP
T1
tCK
tCKH
tCL
T2
tCH
T3
T4
T5
T6
T7
ACTIVE
tCMS tCMH
DQM
tAS
ADDR
tAH
COLUMN
m
ENABLE AUTO PRECHARGE
ROW
tAS
A10
tAH
ROW
tAS
BA0, BA1
tAH
DISABLE AUTO PRECHARGE
BANK
BANK
tDS
DQ
tRCD
tDH
D
IN
m
tDS
tDH
tDS
tDH
D
IN
m
+ 2
D
IN
m
+ 3
DON’T CARE
Notes:
1. For this example, BL = 4.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
71
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.