64Mb: x4, x8, x16
SDRAM
CAS Latency
The CAS latency is the delay, in clock cycles, be-
tween the registration of a READ command and the
availability of the first piece of output data. The latency
can be set to two or three clocks.
If a READ command is registered at clock edge
n,
and
the latency is
m
clocks, the data will be available by
clock edge
n + m.
The DQs will start driving as a result
of the clock edge one cycle earlier (n
+ m
- 1), and
provided that the relevant access times are met, the
data will be valid by clock edge
n + m.
For example,
assuming that the clock cycle time is such that all
relevant access times are met, if a READ command is
registered at T0 and the latency is programmed to two
clocks, the DQs will start driving after T1 and the data
will be valid by T2, as shown in Figure 2. Table 2
indicates the operating frequencies at which each CAS
latency setting can be used.
Reserved states should not be used as unknown
operation or incompatibility with future versions
may result.
T0
CLK
COMMAND
T1
T2
T3
Operating Mode
The normal operating mode is selected by setting
M7 and M8 to zero; the other combinations of values
for M7 and M8 are reserved for future use and/or test
modes. The programmed burst length applies to both
READ and WRITE bursts.
Test modes and reserved states should not be used
because unknown operation or incompatibility with
future versions may result.
Write Burst Mode
When M9 = 0, the burst length programmed via
M0-M2 applies to both READ and WRITE bursts; when
M9 = 1, the programmed burst length applies to
READ bursts, but write accesses are single-location
(nonburst) accesses.
Table 2
CAS Latency
ALLOWABLE OPERATING
FREQUENCY (MHz)
SPEED
-7G
-7E
-75
-8E
CAS
LATENCY = 2
–
≤
133
≤
100
≤
100
CAS
LATENCY = 3
≤
143
≤
143
≤
133
≤
125
READ
NOP
tLZ
NOP
tOH
D
OUT
DQ
tAC
CAS Latency = 2
T0
CLK
COMMAND
T1
T2
T3
T4
READ
NOP
NOP
tLZ
NOP
tOH
D
OUT
DQ
tAC
CAS Latency = 3
DON’T CARE
UNDEFINED
Figure 2
CAS Latency
64Mb: x4, x8, x16 SDRAM
64MSDRAM.p65 – Rev. 11/99
10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1999, Micron Technology, Inc.
MICRON [ MICRON TECHNOLOGY ]
