64Mb: x4, x8, x16
SDRAM
FUNCTIONAL BLOCK DIAGRAM
8 Meg x 8 SDRAM
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
COMMAND
DECODE
MODE REGISTER
REFRESH 12
COUNTER
12
12
ROW-
ADDRESS
MUX
12
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
4096
BANK0
MEMORY
ARRAY
(4,096 x 512 x 8)
1
1
DQM
SENSE AMPLIFIERS
8
4096
DATA
OUTPUT
REGISTER
2
A0-A11,
BA0, BA1
ADDRESS
REGISTER
BANK
CONTROL
LOGIC
14
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
8
512
(x8)
8
DQ0-DQ7
2
DATA
INPUT
REGISTER
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
9
9
64Mb: x4, x8, x16 SDRAM
64MSDRAM.p65 – Rev. 11/99
5
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©1999, Micron Technology, Inc.