64Mb: x32 SDRAM
Functional Block Diagrams
Functional Block Diagrams
Figure 1: 2 Meg x 32 Functional Block Diagram
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK 2
BANK 1
BANK 0
BANK 3
COMMAND
DECODE
MODE REGISTER
11
REFRESH 11
COUNTER
ROW-
ADDRESS
MUX
11
11
BANK 0
ROW-
ADDRESS
LATCH
&
DECODER
2048
BANK0
MEMORY
ARRAY
(2048 x 256 x 32)
4
4
DQM[3:0]
SENSE AMPLIFIERS
32
8192
DATA
OUTPUT
REGISTER
2
A[10:0],
BA[1:0]
13
ADDRESS
REGISTER
2
BANK
CONTROL
LOGIC
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
256
(x32)
COLUMN
DECODER
32
32
DQ[31:0]
DATA
INPUT
REGISTER
8
COLUMN-
ADDRESS
COUNTER/
LATCH
8
PDF: 09005aef811ce1fe
64mb_x32_sdram.pdf - Rev. T 04/13 EN
8
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
1999 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
