128Mb: x4, x8, x16
SDRAM
FUNCTIONAL BLOCK DIAGRAM
32 Meg x 4 SDRAM
CKE
CLK
CONTROL
LOGIC
CS#
WE#
BANK3
BANK2
CAS#
RAS#
BANK1
REFRESH
COUNTER
12
MODE REGISTER
12
BANK0
ROW-
ADDRESS
LATCH
&
ROW-
ADDRESS
MUX
12
BANK0
MEMORY
ARRAY
1
1
4096
DQM
12
(4,096 x 2,048 x 4)
DECODER
DATA
OUTPUT
REGISTER
SENSE AMPLIFIERS
4096
4
DQ0-
DQ3
I/O GATING
2
4
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
BANK
CONTROL
LOGIC
A0-A11,
BA0, BA1
ADDRESS
REGISTER
14
DATA
INPUT
REGISTER
2
4
2048
(x4)
COLUMN
DECODER
COLUMN-
ADDRESS
COUNTER/
LATCH
11
11
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
5
MICRON [ MICRON TECHNOLOGY ]
