128Mb: x32 SDRAM
Electrical Specifications – AC Operating Conditions
Table 13: AC Functional Characteristics
Notes 1–6 apply to all parameters and conditions
Parameter
READ/WRITE command to READ/WRITE command
CKE to clock disable or power-down entry mode
CKE to clock enable or power-down exit setup mode
DQM to input data delay
DQM to data mask during WRITEs
DQM to data High-Z during READs
WRITE command to input data delay
Data-in to ACTIVE command
CL = 3
CL = 2
CL = 1
Data-in to PRECHARGE command
Last data-in to burst STOP command
Last data-in to new READ/WRITE command
Last data-in to burst PRECHARGE command
LOAD MODE REGISTER command to ACTIVE or REFRESH com-
mand
Data-out to High-Z from PRECHARGE command
CL = 3
CL = 2
CL = 1
Notes:
Symbol
t
CCD
t
CKED
t
PED
t
DQD
t
DQM
t
DQZ
t
DWD
t
DAL(3)
t
DAL(2)
t
DAL(1)
t
DPL
t
BDL
t
CDL
t
RDL
t
MRD
t
ROH(3)
t
ROH(2)
t
ROH(1)
-6
1
1
1
0
0
2
0
5
4
3
3
1
1
2
2
3
2
1
-6A
1
1
1
0
0
2
0
4
4
3
3
1
1
2
2
3
2
1
-7
1
1
1
0
0
2
0
5
4
3
3
1
1
2
2
3
2
1
Unit Notes
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
t
CK
1. Minimum specifications are used only to indicate the cycle time at which proper opera-
tion over the full temperature range is ensured:
0˚C
≤
T
A
≤
+70˚C (commercial)
–40˚C
≤
T
A
≤
+85˚C (industrial)
–40˚C
≤
T
A
≤
+105˚C (automotive)
2. Minimum specifications are used only to indicate the cycle time at which proper opera-
tion over the full temperature range is ensured for IT parts:
0˚C
≤
T
A
≤
+70˚C
–40˚C
≤
T
A
≤
+85˚C
3. An initial pause of 100μs is required after power-up, followed by two AUTO REFRESH
commands, before proper device operation is ensured. (V
DD
and V
DDQ
must be powered
up simultaneously. V
SS
and V
SSQ
must be at same potential.) The two AUTO REFRESH
command wake-ups should be repeated any time the
t
REF refresh requirement is excee-
ded.
4. AC characteristics assume
t
T = 1ns.
5. In addition to meeting the transition rate specification, the clock and CKE must transit
between V
IH
and V
IL
(or between V
IL
and V
IH
) in a monotonic manner.
6.
t
HZ defines the time at which the output achieves the open circuit condition; it is not a
reference to V
OH
or V
OL
. The last valid data element will meet
t
OH before going High-Z.
7. Not applicable for Revision G.
8. V
IH
overshoot: V
IH,max
= V
DDQ
+ 1.2V for a pulse width
≤3ns,
and the pulse width cannot
be greater than one third of the cycle rate. V
IL
undershoot: V
IL,min
= –1.2V for a pulse
width
≤3ns,
and the pulse width cannot be greater than one third of the cycle rate.
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. U 04/13 EN
21
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2001 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
