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MT48LC4M32B2 参数 Datasheet PDF下载

MT48LC4M32B2图片预览
型号: MT48LC4M32B2
PDF下载: 下载PDF文件 查看货源
内容描述: 128MB : X32 SDRAM MT48LC4M32B2 â ???? 1梅格×32× 4银行 [128Mb: x32 SDRAM MT48LC4M32B2 – 1 Meg x 32 x 4 Banks]
分类和应用: 动态存储器
文件页数/大小: 79 页 / 3554 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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128Mb: x32 SDRAM
READ Operation
Continuous-page READ bursts can be truncated with a BURST TERMINATE command
and fixed-length READ bursts can be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST TERMINATE command
should be issued
x
cycles before the clock edge at which the last desired data element is
valid, where
x
= CL - 1. This is shown in Figure 21 (page 48) for each possible CAS la-
tency; data element
n
+ 3 is the last desired data element of a longer burst.
Figure 21: Terminating a READ Burst
T0
CLK
T1
T2
T3
T4
T5
T6
Command
READ
NOP
NOP
NOP
BURST
TERMINATE
X = 1 cycle
NOP
NOP
Address
Bank,
Col n
DQ
CL = 2
D
OUT
D
OUT
D
OUT
D
OUT
T0
CLK
T1
T2
T3
T4
T5
T6
T7
Command
READ
NOP
NOP
NOP
BURST
TERMINATE
NOP
X = 2 cycles
NOP
NOP
Address
Bank,
Col n
DQ
CL = 3
D
OUT
D
OUT
D
OUT
D
OUT
Transitioning data
Don’t Care
Note:
1. DQM is LOW.
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. U 04/13 EN
48
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2001 Micron Technology, Inc. All rights reserved.