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MT48LC16M16A2TG 参数 Datasheet PDF下载

MT48LC16M16A2TG图片预览
型号: MT48LC16M16A2TG
PDF下载: 下载PDF文件 查看货源
内容描述: SDR SDRAM [SDR SDRAM]
分类和应用: 动态存储器
文件页数/大小: 86 页 / 3693 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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256Mb: x4, x8, x16 SDRAM
Features
SDR SDRAM
MT48LC64M4A2 – 16 Meg x 4 x 4 banks
MT48LC32M8A2 – 8 Meg x 8 x 4 banks
MT48LC16M16A2 – 4 Meg x 16 x 4 banks
Features
• PC100- and PC133-compliant
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal, pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto precharge
and auto refresh modes
• Self refresh mode (not available on AT devices)
• Auto refresh
– 64ms, 8192-cycle refresh (commercial and
industrial)
– 16ms, 8192-cycle refresh (automotive)
• LVTTL-compatible inputs and outputs
• Single 3.3V ±0.3V power supply
Options
– 60-ball FBGA (x4, x8) (8mm x 16mm)
– 60-ball FBGA (x4, x8) (8mm x 16mm)
Pb-free
– 54-ball VFBGA (x16) (8mm x 14 mm)
– 54-ball VFBGA (x16) (8mm x 14 mm)
Pb-free
– 54-ball VFBGA (x16) (8mm x 8 mm)
– 54-ball VFBGA (x16) (8mm x 8 mm)
Pb-free
Timing – cycle time
– 6ns @ CL = 3 (x8, x16 only)
– 7.5ns @ CL = 3 (PC133)
– 7.5ns @ CL = 2 (PC133)
Self refresh
– Standard
– Low power
Operating temperature range
– Commercial (0˚C to +70˚C)
– Industrial (–40˚C to +85˚C)
– Automotive (–40˚C to +105˚C)
Revision
Notes:
1.
2.
3.
4.
Off-center parting line.
Only available on Revision D.
Only available on Revision G.
Contact Micron for availability.
Marking
FB
BB
FG
BG
F4
B4
-6A
-75
-7E
None
None
IT
AT
:D/:G
Options
• Configurations
– 64 Meg x 4 (16 Meg x 4 x 4 banks)
– 32 Meg x 8 (8 Meg x 8 x 4 banks)
– 16 Meg x 16 (4 Meg x 16 x 4 banks)
• Write recovery (
t
WR)
t
WR = 2 CLK
• Plastic package – OCPL
– 54-pin TSOP II OCPL
(400 mil)
(standard)
– 54-pin TSOP II OCPL
(400 mil)
Pb-free
Table 1: Key Timing Parameters
CL = CAS (READ) latency
Speed Grade
-6A
-75
-7E
Clock
Frequency (MHz)
167
133
133
Marking
64M4
32M8
16M16
A2
TG
P
Target
t
RCD-
t
RP-CL
3-3-3
3-3-3
2-2-2
t
RCD
(ns)
t
RP
(ns)
CL (ns)
18
20
15
18
20
15
18
20
15
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. R 10/12 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
1999 Micron Technology, Inc. All rights reserved.