4 MEG x 4
FPM DRAM
DRAM
FEATURES
• Industry-standard x4 pinout, timing, functions,
and packages
• High-performance, low-power CMOS silicon-gate
process
• Single power supply (+3.3V ±0.3V or +5V ±0.5V)
• All inputs, outputs and clocks are TTL-compatible
• Refresh modes: RAS#-ONLY, HIDDEN and CAS#-
BEFORE-RAS# (CBR)
• Optional self refresh (S) for low-power data
retention
• 11 row, 11 column addresses (2K refresh) or
12 row, 10 column addresses (4K refresh)
• FAST-PAGE-MODE (FPM) access
• 5V tolerant inputs and I/Os on 3.3V devices
MT4LC4M4B1, MT4C4M4B1
MT4LC4M4A1, MT4C4M4A1
PIN ASSIGNMENT (Top View)
24/26-Pin SOJ
V
CC
DQ0
DQ1
WE#
RAS#
**NC/A11
A10
A0
A1
A2
A3
V
CC
24/26-Pin TSOP
V
CC
V
SS
DQ0
DQ3
DQ1
DQ2
WE#
CAS#
RAS#
OE#
**NC/A11
A9
A10
A0
A8
A1
A7
A2
A6
A3
A5
V
CC
A4
V
SS
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
V
SS
DQ3
DQ2
CAS#
OE#
A9
A8
A7
A6
A5
A4
V
SS
1
2
3
4
5
6
8
9
10
11
12
13
26
25
24
23
22
21
19
18
17
16
15
14
OPTIONS
• Voltage
3.3V
5V
• Refresh Addressing
2,048 (2K) rows
4,096 (4K) rows
• Packages
Plastic SOJ (300 mil)
Plastic TSOP (300 mil)
• Timing
50ns access
60ns access
• Refresh Rates
Standard Refresh
Self Refresh (128ms period)
MARKING
LC
C
B1
A1
DJ
TG
-5
-6
None
S*
**NC on 2K refresh and A11 on 4K refresh options.
4 MEG x 4 FPM DRAM PART NUMBERS
PART NUMBER
MT4LC4M4B1DJ-6
MT4LC4M4B1DJ-6 S
MT4LC4M4B1TG-6
MT4LC4M4B1TG-6 S
MT4LC4M4A1DJ-6
MT4LC4M4A1DJ-6 S
MT4LC4M4A1TG-6
MT4C4M4A1TG-6 S
MT4C4M4B1DJ-6
MT4C4M4B1DJ-6 S
MT4C4M4B1TG-6
MT4C4M4B1TG-6 S
MT4C4M4A1DJ-6
MT4C4M4A1DJ-6 S
MT4C4M4A1TG-6
MT4C4M4A1TG-6 S
V
CC
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
5V
5V
5V
5V
5V
5V
5V
5V
REFRESH
ADDRESSING PACKAGE REFRESH
2K
2K
2K
2K
4K
4K
4K
4K
2K
2K
2K
2K
4K
4K
4K
4K
SOJ
SOJ
TSOP
TSOP
SOJ
SOJ
TSOP
TSOP
SOJ
SOJ
TSOP
TSOP
SOJ
SOJ
TSOP
TSOP
Standard
Self
Standard
Self
Standard
Self
Standard
Self
Standard
Self
Standard
Self
Standard
Self
Standard
Self
NOTE:
1. The 4 Meg x 4 FPM DRAM base number differenti-
ates the offerings in one place—MT4LC4M4B1. The
fifth field distinguishes various options: B1
designates a 2K refresh and A1 designates a 4K
refresh for FPM DRAMs.
2. The # symbol indicates signal is active LOW.
*Contact factory for availability
Part Number Example:
MT4LC4M4B1DJ
KEY TIMING PARAMETERS
SPEED
-5
-6
t
RC
t
RAC
t
PC
t
AA
t
CAC
t
RP
84ns
110ns
50ns
60ns
20ns
35ns
25ns
30ns
13ns
15ns
30ns
40ns
4 Meg x 4 FPM DRAM
D49_5V.p65 – Rev. 5/00
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
MICRON [ MICRON TECHNOLOGY ]
