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MT58L256L36F 参数 Datasheet PDF下载

MT58L256L36F图片预览
型号: MT58L256L36F
PDF下载: 下载PDF文件 查看货源
内容描述: 8MB : 512K ×18 , 256K X 32/36流通型SyncBurst SRAM [8Mb: 512K x 18, 256K x 32/36 FLOW-THROUGH SYNCBURST SRAM]
分类和应用: 静态存储器
文件页数/大小: 27 页 / 472 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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8Mb: 512K x 18, 256K x 32/36
FLOW-THROUGH SYNCBURST SRAM
8Mb SYNCBURST
SRAM
FEATURES
• Fast clock and OE# access times
• Single +3.3V +0.3V/-0.165V power supply (V
DD
)
• Separate +3.3V or +2.5V isolated output buffer
supply (V
DD
Q)
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL
WRITE
• Three chip enables for simple depth expansion
and address pipelining
• Clock-controlled and registered addresses, data I/
Os and control signals
• Internally self-timed WRITE cycle
• Burst control (interleaved or linear burst)
• Automatic power-down for portable applications
• 100-pin TQFP package
• 165-pin FBGA
• Low capacitive bus loading
• x18, x32, and x36 versions available
MT58L512L18F, MT58L256L32F,
MT58L256L36F; MT58L512V18F,
MT58L256V32F, MT58L256V36F
3.3V V
DD
, 3.3V or 2.5V I/O, Flow-Through
100-Pin TQFP*
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
• Timing (Access/Cycle/MHz)
7.5ns/8.8ns/113 MHz
8.5ns/10ns/100 MHz
10ns/15ns/66 MHz
• Configurations
3.3V I/O
512K x 18
256K x 32
256K x 36
2.5V I/O
512K x 18
256K x 32
256K x 36
• Packages
100-pin TQFP (2-chip enable)
100-pin TQFP (3-chip enable)
165-pin, 13mm x 15mm FBGA
• Operating Temperature Range
Commercial (0°C to +70°C)
Part Number Example:
MARKING*
-7.5
-8.5
-10
MT58L512L18F
MT58L256L32F
MT58L256L36F
MT58L512V18F
MT58L256V32F
MT58L256V36F
T
S
F
None
*JEDEC-standard MS-026 BHA (LQFP).
GENERAL DESCRIPTION
The Micron
®
SyncBurst
SRAM family employs
high-speed, low-power CMOS designs that are fabri-
cated using an advanced CMOS process.
Micron’s 8Mb SyncBurst SRAMs integrate a 512K x
18, 256K x 32, or 256K x 36 SRAM core with advanced
synchronous peripheral circuitry and a 2-bit burst
counter. All synchronous inputs pass through registers
controlled by a positive-edge-triggered single-clock in-
put (CLK). The synchronous inputs include all ad-
dresses, all data inputs, active LOW chip enable (CE#),
two additional chip enables for easy depth expansion
(CE2#, CE2), burst control inputs (ADSC#, ADSP#,
MT58L256V36FT-10
* A Part Marking Guide for the FBGA devices can be found on Micron's
web site—http://www.micronsemi.com/support/index.html.
8Mb: 512K x 18, 256K x 32/36 Flow-Through SyncBurst SRAM
MT58L512L18F_2.p65 – Rev. 7/00
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.