MT9V111 - 1/4-Inch SOC VGA Digital Image Sensor
IFP Register Description
IFP Register Description
Table 7:
Register
1
0x01
IFP Register Description
Bits
Default
Name
7:0
1
Register address space selection.
This register controls the address space for the two-wire serial interface communications. Set Reg0x01 = 1 to
select IFP address space and Reg0x01 = 4 for sensor space. Reg0x01 is always accessible regardless of the page
currently selected.
3:0
11
Aperture correction (sharpening).
2:0
3
Sharpening factor:
”000”
—
no sharpening.
”001”
—
25% sharpening.
”010”
—
50% sharpening.
”011”
—
75% sharpening.
”100”
—
100% sharpening.
”101”
—
125% sharpening.
”110”
—
150% sharpening.
”111”
—
200% sharpening.
3
1
Automatically reduces sharpness in low light.
15:0
28686
Operating mode control.
0
1
3:2
0
1
3
Reserved.
“1”
—
enables auto white balance.
“0”
—
stops AWB at the current values.
Back light compensation:
”00”
—
AE measurement window is specified by Reg0x26 and Reg0x27 (“large
window”).
“01”
—
AE measurement window is specified by Reg0x2B and Reg0x2C (“center
window”).
“10” and “11”
—
AE measurement window is a weighted sum of “large window” and
“center window” with center window given twice the weight.
“1”
—
bypass color correction matrix.
“0”
—
normal color processing.
Reserved.
Reserved.
“1”
—
ITU_R BT.656 synchronization codes are embedded in the image.
N/A
Reserved.
Reserved.
Enable aperture correction knee.
“1”
—
enables on-the-fly defect correction.
“1”
—
enable auto exposure.
Reserved.
Image flow processor soft reset.
Asserts reset on all IFP registers.
Example: write Reg0x07 = 1 followed by Reg0x07 = 0 to reset IFP.
5
0x05
6
0x06
4
5
6
7
9:8
10
11
12
13
14
15
0
0
0
0
0
0
0
0
1
1
1
0
0
7
0x07
09005aef80e90084
MT9V111_2.fm - Rev. G 1/05 EN
16
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2004 Micron Technology, Inc. All rights reserved.
MICRON [ MICRON TECHNOLOGY ]
