512Mb, Multiple I/O Serial Flash Memory
Nonvolatile and Volatile Registers
Table 16: Enhanced Volatile Configuration Register Bit Definitions (Continued)
Note 1 applies to entire table
Bit
Name
Settings
Description
Notes
2:0
Output driver strength 000 = Reserved
001 = 90 Ohms
Optimizes impedance at VCC/2 output voltage.
010 = 60 Ohms
011 = 45 Ohms
100 = Reserved
101 = 20 Ohms
110 = 15 Ohms
111 = 30 (Default)
1. Settings determine the device memory configuration upon a change of those settings by
the WRITE ENHANCED VOLATILE CONFIGURATION REGISTER command. The register is
read from or written to in all protocols by READ ENHANCED VOLATILE CONFIGURATION
REGISTER or WRITE ENHANCED VOLATILE CONFIGURATION REGISTER commands, respec-
tively.
Notes:
2. If bits 6 and 7 are both set to 0, the device operates in quad I/O. When either bit 6 or 7 is
reset to 0, the device operates in dual I/O or quad I/O respectively following the next
WRITE ENHANCED VOLATILE CONFIGURATION command.
Flag Status Register
Table 17: Flag Status Register Bit Definitions
Note 1 applies to entire table
Bit Name
Settings
Description
Notes
7
Program or
erase
controller
0 = Busy
1 = Ready
Status bit: Indicates whether one of the following
command cycles is in progress: WRITE STATUS
REGISTER, WRITE NONVOLATILE CONFIGURATION
REGISTER, PROGRAM, or ERASE.
2, 5
6
5
4
Erase suspend 0 = Not in effect
1 = In effect
Status bit: Indicates whether an ERASE operation has
been or is going to be suspended.
2
Erase
0 = Clear
Error bit: Indicates whether an ERASE operation has
3, 4
3, 4
1 = Failure or protection error succeeded or failed.
Program
0 = Clear
Error bit: Indicates whether a PROGRAM operation has
1 = Failure or protection error succeeded or failed; also an attempt to program a 0 to
a 1 when VPP = VPPH and the data pattern is a multiple
of 64 bits.
3
2
1
VPP
0 = Enabled
1 = Disabled (Default)
Error bit: Indicates an invalid voltage on VPP during a
PROGRAM or ERASE operation.
3, 4
2
Program sus-
pend
0 = Not in effect
1 = In effect
Status bit: Indicates whether a PROGRAM operation
has been or is going to be suspended.
Protection
0 = Clear
Error bit: Indicates whether an ERASE or PROGRAM
3, 4
1 = Failure or protection error operation has attempted to modify the protected array
sector, or whether a PROGRAM operation has attemp-
ted to access the locked OTP space.
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
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