128Mb, 256Mb, 512Mb, 1Gb StrataFlash Memory
Flowcharts
Figure 42: Buffered Enhanced Factory Programming (BEFP) Procedure
Setup Phase
Start
Program and Verify Phase
Data stream
ready
Initialize count:
X=0
Write data @
ST
word address
1
Exit Phase
Read status
register
V
PP
applied,
block unlocked
Write 0x80 @
ST
word address
1
Write 0xD0 @
1
ST
word address
No (SR7 = 0)
BEFP exited?
Yes (SR7 = 1)
Full status
check procedure
Program
complete
Increment count:
X=X+1
BEFP setup
delay
Read status
register
No
X = 512?
Yes
Read status
register
BEFP setup
successful?
Yes (SR7 = 0)
Program
done?
No (SR0 = 1)
No (SR7 = 1)
Check V
PP
, lock
errrors (SR3,1)
Yes (SR0 = 0)
No
Last data?
Yes
Write 0xFFFF,
address in
different block
within partition
Exit
Bus
Operation
Setup Phase
WRITE
WRITE
WRITE
READ
Action
Comments
Unlock block V
PPH
applied to V
PP
BEFP setup
Data = 0x80 @ first word address
1
BEFP confirm Data = 0xD0 @ first word address
Status register Data = Status register data
Adress = First word address
PDF: 09005aef8448483a
128_256_512_65nm_g18.pdf - Rev. F 8/11 EN
98
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2011 Micron Technology, Inc. All rights reserved.