256Mb, 512Mb, 1Gb, 2Gb: 3V Embedded Parallel NOR Flash
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 8
Figure 2: 2Gb Configuration ............................................................................................................................ 9
Figure 3: 56-Pin TSOP (Top View) .................................................................................................................. 10
Figure 4: 64-Ball Fortified BGA ....................................................................................................................... 11
Figure 5: Data Polling Flowchart .................................................................................................................... 18
Figure 6: Toggle Bit Flowchart ........................................................................................................................ 19
Figure 7: Status Register Polling Flowchart ..................................................................................................... 20
Figure 8: Lock Register Program Flowchart ..................................................................................................... 22
Figure 9: Boundary Condition of Program Buffer Size ..................................................................................... 30
Figure 10: WRITE TO BUFFER PROGRAM Flowchart ...................................................................................... 31
Figure 11: Program/Erase Nonvolatile Protection Bit Algorithm ...................................................................... 42
Figure 12: Software Protection Scheme .......................................................................................................... 47
Figure 13: Power-Up Timing .......................................................................................................................... 53
Figure 14: Reset AC Timing – No PROGRAM/ERASE Operation in Progress ...................................................... 54
Figure 15: Reset AC Timing During PROGRAM/ERASE Operation .................................................................... 54
Figure 16: AC Measurement Load Circuit ....................................................................................................... 56
Figure 17: AC Measurement I/O Waveform ..................................................................................................... 56
Figure 18: Random Read AC Timing (8-Bit Mode) ........................................................................................... 60
Figure 19: Random Read AC Timing (16-Bit Mode) ......................................................................................... 60
Figure 20: BYTE# Transition Read AC Timing .................................................................................................. 61
Figure 21: Page Read AC Timing (16-Bit Mode) ............................................................................................... 61
Figure 22: WE#-Controlled Program AC Timing (8-Bit Mode) .......................................................................... 63
Figure 23: WE#-Controlled Program AC Timing (16-Bit Mode) ......................................................................... 64
Figure 24: CE#-Controlled Program AC Timing (8-Bit Mode) ........................................................................... 66
Figure 25: CE#-Controlled Program AC Timing (16-Bit Mode) ......................................................................... 67
Figure 26: Chip/Block Erase AC Timing (8-Bit Mode) ...................................................................................... 68
Figure 27: Accelerated Program AC Timing ..................................................................................................... 69
Figure 28: Data Polling AC Timing .................................................................................................................. 69
Figure 29: Toggle/Alternative Toggle Bit Polling AC Timing (8-Bit Mode) .......................................................... 70
Figure 30: 56-Pin TSOP – 14mm x 20mm ........................................................................................................ 72
Figure 31: 64-Ball Fortified BGA – 11mm x 13mm ........................................................................................... 73
PDF: 09005aef849b4b09
m29ew_256mb_2gb.pdf - Rev. B 8/12 EN
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